FX, CS, and CDR > CD-700 Jitter Attenuation

CD-700 Jitter Attenuation

The VI CD-700 is a user-confi gurable crystal based PLL integrated circuit. It includes a digital phase detector, op-amp, VCXO and additional integrated functions for use in digital synchronization applications. Loop fi lter software is available as well SPICE models for circuit simulation.

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Download:

Sync-E CD-700 Product Data Sheet (483 K)
Download Loop Component Selection
& Simulation Software
Download Instructions For Loop Component Selection
& Simulation Software
CD-700 Brochure, A quartz stabilized PLL (672 K)
CD-700/TRU-050 Code Mark Inversion (CMI) Input Data (32 K)
Tutorial on Clock and Data Recovery Devices
Definition of Absolute Pull Range (404 K)

Features:

5 x 7.5 x 2 mm, smallest VCXO PLL available
Two Output Frequencies (25 MHz and 50 MHz)
Integrated Phase Jitter < 200 fsec
5.0 or 3.3 Vdc operation
Tri-State Output
Holdover on Loss of Signal Alarm
VCXO with CMOS outputs
–40/85°C temperature range
Hermetically sealed ceramic SMD package

Applications:

Jitter Attenuation
Clock Smoothing
Synchronous Ethernet, G.8262